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[Other Embeded programpcit32_verilog_lattice

Description: 本文件是pci的verilog源代码程序-pci the Verilog source code procedures
Platform: | Size: 430080 | Author: 王立华 | Hits:

[VHDL-FPGA-VerilogExp6-VGA

Description: 通过UART从PC主机读取图片数据,并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show
Platform: | Size: 681984 | Author: 萧飒 | Hits:

[VHDL-FPGA-Verilogu-uart

Description: 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
Platform: | Size: 5120 | Author: 李文文 | Hits:

[VHDL-FPGA-VerilogFPGAUART

Description: 一个基于FPGA的串口程序,已经经过验证,对用FPGA做串口的朋友提供参考和借鉴!-an FPGA-based serial procedures have proven, right Serial do with FPGA reference for a friend and borrow!
Platform: | Size: 311296 | Author: 舟舟 | Hits:

[VHDL-FPGA-Verilogserial_ppga

Description: 异步串口通信口在FPGA实现,功能有(1)串行数据接收的同步控制;(2) 串行数据发送的同步控制-asynchronous serial communication port of the FPGA, function (1) serial data receiver synchronization control; (2) the transmission of serial data synchronization control
Platform: | Size: 199680 | Author: 孙洪亮 | Hits:

[OtherPCI_Bridge_Guest_UART

Description: 这是用pci-wishbone核和16450串口核在xilinx的fpga上实现的串口程序,用verilog实现,ise7.1,不知道这里可不可以上传硬件的程序~-pci-wishbone nuclear and nuclear Serial 16,450 in the TP xilinx They achieved a serial program, verilog realization ise7.1. Can here do not know the procedures upload hardware ~
Platform: | Size: 8427520 | Author: heartbeat | Hits:

[Embeded-SCM Developfpga_digit_serial_arithmetic_1

Description: fpga/CPLD开发管理Digit-Serial DSP Functions-fpga/CPLD Development and Management of Digit-Serial DSP Functions
Platform: | Size: 2659328 | Author: liuandy | Hits:

[VHDL-FPGA-Veriloguart_verilog

Description: 简化的串口通信,去掉了奇偶校验位,波特率为9600,测试通过,fpga型号为xinlinx vp20-Simplified serial communication, removing the parity bit, the baud rate to 9600, test, fpga model xinlinx vp20
Platform: | Size: 5120 | Author: 刘红亮 | Hits:

[Other Embeded programDevelopment_Guide_of_socFPG

Description: socFPGA开发简明教程 教程以非常详细的实例来让初学者了解基于QuartusII和NiosII IDE的FPGA/SOPC开发基本流程。-Concise Guide socFPGA developed a very detailed tutorial with examples to get beginners to understand QuartusII and NiosII IDE based on the FPGA/SOPC development of the basic processes.
Platform: | Size: 1629184 | Author: tian | Hits:

[Software EngineeringFPGAUART

Description: 用VHDl设计UART的文章,使用QuartusII平台-Design with VHDL UART article, use QuartusII platform
Platform: | Size: 136192 | Author: 胡玉贵 | Hits:

[VHDL-FPGA-Veriloguart

Description: 串口通讯协议,你您可以自己建个工程,再将需要的VHDL文本,添加到工程中,理解程序在仿真!-Serial communication protocol, you can build your project, and then need VHDL text, added to the project, understand the procedures in the simulation!
Platform: | Size: 10240 | Author: 张亚伟 | Hits:

[OtherFPGAQUARTUSII

Description: 很好的FPGA设计教程,主要是quartus II的使用等,包括NIOS!-FPGA design of a good tutorial, mainly the use of quartus II, including the NIOS!
Platform: | Size: 2181120 | Author: cai | Hits:

[VHDL-FPGA-VerilogFPGA_UART

Description: 异步通信串行口设计实例,很实用。比较经典。-Asynchronous serial port communications design example, it is practical. Comparison of the classic.
Platform: | Size: 493568 | Author: 王网 | Hits:

[VHDL-FPGA-Verilog16550

Description: UART16550兼容的串行通讯控制器,Verilog语言描述,采用Altera Cyclone系列芯片实现FPGA综合,因为FIFO部分利用到内部资源实现。已经在某项目中成功应用,特此推出。-UART16550 compatible serial communication controller, Verilog language description, the use of Altera Cyclone series FPGA chip integrated, as part of the use of FIFO to the internal resources to achieve. Projects have been in a successful application, is hereby introduced.
Platform: | Size: 10240 | Author: David.Mr.Liu | Hits:

[VHDL-FPGA-VerilogUART

Description: 输入时钟20M,波特率为9600,实现串口收发功能,通过修改内部分频系数可实现其它波特率的收发-Input clock 20M, the baud rate for 9600, Serial transceiver functions, by modifying the frequency of some other baud rate coefficient can realize the transceiver
Platform: | Size: 7168 | Author: 杨启勇 | Hits:

[VHDL-FPGA-Verilogxilinx_uart_vhdl

Description: 这是xilinx公司的uart源代码,希望对需要的朋友有所帮助-This is the Xilinx
Platform: | Size: 10240 | Author: adsjkloi | Hits:

[VHDL-FPGA-Veriloggh_uart_16550_080407

Description: FPGA开发中常用的串口模块,经过本人调试,非常实用-Commonly used in FPGA development serial module, after I debug, very useful
Platform: | Size: 16384 | Author: libin | Hits:

[VHDL-FPGA-VerilogUART_send

Description: Verilog HDL 串口发送程序,在ACTEL Fusion FPGA上实验成功 ,和大家一起分享!^_^-Verilog HDL send serial procedures, ACTEL Fusion FPGA in the success of the experiment, and share with everyone! ^ _ ^
Platform: | Size: 1024 | Author: whq | Hits:

[VHDL-FPGA-VerilogUART_rec

Description: verilog 串口接收程序,在ACTEL Fusion FPGA上实验成功 和大家一起分享!^_^-Verilog serial receive process, ACTEL Fusion FPGA in the experimental success and share with everyone! ^ _ ^
Platform: | Size: 1024 | Author: whq | Hits:

[VHDL-FPGA-Verilogscorce

Description: FPGA驱动1602LCD程序,在实验板上实验成功,和大家分享!^_^-FPGA-driven 1602LCD procedures, the success of the experiment on-board experiments, and the U.S. to share! ^ _ ^
Platform: | Size: 2048 | Author: whq | Hits:
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